Integrated circuits are made by forming on a semiconductor substrate layers of conductive material that are separated by dielectric (insulation) layers. Vias and/or trenches are etched in the dielectric layers and are filled with a conducting material to electrically connect the separated conductive layers. The vias and/or trenches filled with the conductive materials may be referred to as interconnects.
Sacrificial materials (e.g., sacrificial light materials and organic BARC material) have been used in the fabrication of semiconductor devices, for example, in making dual damascene metal interconnects. Dual damascene metal interconnects may enable reliable low cost production of integrated circuits using sub 0.25 micron process technology. Before such interconnects can realize their full potential, however, problems related to the process for making them must be addressed. One problem involves the lithography for defining dual damascene vias and trenches. Sacrificial materials, BARC materials, and photoresist materials are used throughout the lithography processes. The ability to remove these materials is crucial for the semiconductor processing. Another problem relates to the selectivity of removing certain materials, which are used to make dual damascene devices, after or throughout the processes where the vias and trenches are etched. At times, it is crucial to remove a particular layer while not affecting another layer. Another problem yet, relates to removing the sacrificial materials used during processing.